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My SA for today:
Pissed off an ex-girlfriend from nearly 30 years ago, without even trying.
I love the Internet.
2017-01-23 16:02 from IGnatius T Foobar
My SA for today:
Pissed off an ex-girlfriend from nearly 30 years ago, without even
trying.
I love the Internet.
It's the best use of Facebook, that's for sure.
This was on Instagram, of all places. Apparently we both follow someone we
both knew in high school. I didn't even know she was there until she came
at me with a two-screenful unhinged deranged screed.
It was GLORIOUS. :)
You know my policy ... people who are too easily offended are the most fun to offend. Better get some thicker skin if you want to hang out on my Internet, cupcake.
It was GLORIOUS. :)
You know my policy ... people who are too easily offended are the most fun to offend. Better get some thicker skin if you want to hang out on my Internet, cupcake.
During the last twelve month, I got married, a university degree and my first real job.
I feel old now. But in a good way.
I still don't have my degree; after five times trying. I've given up (at
least until I retire, *IF* I ever can).
I'm working on a home-made computer as folks may already know. I've recently
decided to take a break from the project. As one does, I got a sudden urge
to work on some aspects of it.
Since I'm taking a more mainframe-y approach to my design these days (a simplification of what I'd eventually like to see), I need mainframe-y style I/O channels to talk to things like a terminal, mass storage, and so forth. So far so good. Long story short, I've narrowed my search down to using either my own adaptation of Spacewire protocol and bog-standard SPI or RS-232.
My Spacewire implementation needs a lot of work still, but is already able to receive data nicely, and with some effort, you can send stuff too. However, the state machine that implements the hardware flow control protocol is (well, WAS) complex, and so I never got around to implementing it. Meh, took a break.
Had more important work to do anyway.
Today, I managed to implement a transmitter (only) for RS-232 which can also be used for SPI as well (or, perhaps accidentally, it's an SPI engine that happens to also support RS-232 transmit as well). It's smaller and faster than the Spacewire implementation I'd originally started out with (Both 64-bit and 11-bit shift register widths top out at 53.5 Mbps when clocked at 107MHz).
This is much faster than my Spacewire implementation, which tops out at 37Mbps, but realistically should be run no faster than 25Mbps for reliable operation on my (limited) FPGA hardware.
As it happens, trying to pit one design against the other for comparison, I learned an implementation technique that *might* allow me to finally finish my Spacewire implementation. So, the battle of Spacewire versus RS-232/SPI is not yet over.
Small achievement from all this background is, bluntly, sometimes you learn the most when you complete throw-away projects.
Two things Adam Savage said which resonates with me: (1) You will fail. Embrace it. (2) The only difference between screwing around and science is writing it down.
Since I'm taking a more mainframe-y approach to my design these days (a simplification of what I'd eventually like to see), I need mainframe-y style I/O channels to talk to things like a terminal, mass storage, and so forth. So far so good. Long story short, I've narrowed my search down to using either my own adaptation of Spacewire protocol and bog-standard SPI or RS-232.
My Spacewire implementation needs a lot of work still, but is already able to receive data nicely, and with some effort, you can send stuff too. However, the state machine that implements the hardware flow control protocol is (well, WAS) complex, and so I never got around to implementing it. Meh, took a break.
Had more important work to do anyway.
Today, I managed to implement a transmitter (only) for RS-232 which can also be used for SPI as well (or, perhaps accidentally, it's an SPI engine that happens to also support RS-232 transmit as well). It's smaller and faster than the Spacewire implementation I'd originally started out with (Both 64-bit and 11-bit shift register widths top out at 53.5 Mbps when clocked at 107MHz).
This is much faster than my Spacewire implementation, which tops out at 37Mbps, but realistically should be run no faster than 25Mbps for reliable operation on my (limited) FPGA hardware.
As it happens, trying to pit one design against the other for comparison, I learned an implementation technique that *might* allow me to finally finish my Spacewire implementation. So, the battle of Spacewire versus RS-232/SPI is not yet over.
Small achievement from all this background is, bluntly, sometimes you learn the most when you complete throw-away projects.
Two things Adam Savage said which resonates with me: (1) You will fail. Embrace it. (2) The only difference between screwing around and science is writing it down.
It's the old "build one to throw away; in the end, you will anyway."
But really, I object to your one-wire "mainframe" channel. You need to use traditional bus-and-tag connectors. If the connector does not break one or more toes when you drop it on your foot, it isn't beefy enough.
(Fond memories of those old mainframe days...)
But really, I object to your one-wire "mainframe" channel. You need to use traditional bus-and-tag connectors. If the connector does not break one or more toes when you drop it on your foot, it isn't beefy enough.
(Fond memories of those old mainframe days...)
Well, I'm using pmod connectors, which are six conductor connectors. ;)
They *could* cause a fly to trip.
I managed to procure a Raspberry Pi 3 last night, and after several hours
of playing with it, managed to get it to program my icoBoard Gamma FPGA board!
I've written my very first Wishbone B4-compatible FPGA core. It feels like
a completely different interconnect than Wishbone B3.
Managed to build a Wishbone B4 bridge for asynchronous static RAM last night.
Most of the bugs worked out; only some intermittent flipped bits that seems to manifest only when one cycle is a write operation and the next immediate cycle is a read operation. Not sure what's causing that yet; wondering if it's due to capacitive loading on the data pins of the RAM chip.
Most of the bugs worked out; only some intermittent flipped bits that seems to manifest only when one cycle is a write operation and the next immediate cycle is a read operation. Not sure what's causing that yet; wondering if it's due to capacitive loading on the data pins of the RAM chip.
I was asked to comment on Linux security administration.
Which is kind of interesting, as my professional background involves mostly Windows.
I'll take it as a small achievement that someone thought enough of my abilities to ask for comments on such a thing.
I didn't wring the fat neck of the board president last night while asking several questions to get an idea why everything failed so badly with my condominium restoration.
He got frustrated with me, and said I never bothered coming to a board meeting while it was happening. I pointed out that, at the time, I lived two hours away, and couldn't easily come to board meetings. I didn't point out that, frankly, I couldn't know how bad things really were until it's all said and done. And, at the end of the day, I wasn't only there to resolve my own problem with the restoration, but to also make sure future problems like this do not happen with other homeowners.
It's that latter part that he doesn't get. Because, I guess, he doesn't think forward, only about the immediate problems. Which is probably why they're having terrible problems with water damage throughout the condominiums now, supposedly from people not responsibly handling their appliances or replacing their water heaters.